Digital System Design (21EE42)

Digital System Design

Course Code 21EE42
CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:2:0 
SEE Marks 50
Total Hours of Pedagogy 40 hours Theory + 8 Lab slots 
Total Marks 100
Credits 04 
Exam Hours 03

MODULE-1

Principles of Combinational Logic: Definition of combinational logic, canonical forms, Generation of switching equations from truth tables, Karnaugh maps-3,4,5 variables, Incompletely specified functions (Don‘t care terms) Simplifying Max term equations, Quine-McCluskey minimization technique, Quine-McCluskey using don‘t care terms, Reduced prime implicants Tables.

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MODULE-2

Analysis and Design of Combinational logic: General approach to combinational logic design, Decoders, BCD decoders, Encoders, digital multiplexers, Using multiplexers as Boolean function generators, Adders and subtractors, Cascading full adders, Look ahead carry, Binary comparators.

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MODULE-3

Flip-Flops: Basic Bistable elements, Latches, Timing considerations, The master-slave flip-flops (pulse- triggered flip-flops): SR flip-flops, JK flip-flops, Edge triggered flip- flops, Characteristic equations.

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MODULE-4

Flip-Flops Applications: Registers, binary ripple counters, synchronous binary counters, Counters based on shift registers, Design of a synchronous counter, Design of a synchronous mod-n counter using clocked T, JK, D and SR flip-flops.

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MODULE 5

Sequential Circuit Design: Mealy and Moore models, State machine notation, Synchronous Sequential circuit analysis, Construction of state diagrams, counter design. Memories: Read only and Read/Write Memories, Programmable ROM, EPROM, Flash memory.

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Important Links:

1. Click here to download Previous Year Question Papers

Experiments

1 Simplification, realization of Boolean expressions using logic gates/Universal gates.

2 Realization of Half/Full adder and Half/Full Subtractors using logic gates.

3 Realization of parallel adder/Subtractors using 7483 chip- BCD to Excess-3 code conversion and Vice -Versa.

4 Realization of Binary to Gray code conversion and vice versa.

5 Design and testing Ring counter/Johnson counter.

6 Design and testing of Sequence generator.

7 Realization of 3 bit counters as a sequential circuit and MOD – N counter design using 7476, 7490, 74192.

8 Verifying its logic operation and obtaining its truth table of flip –flops: RS and JK.

Suggested Learning Resources:

(1) Digital Logic Applications and Design, John M Yarbrough, Thomson Learning, 2001.

(2) Digital Principles and Design, Donald D. Givone, McGraw Hill,2002.

(3) Digital Design, Morris Mano, Prentice Hall of India, Third Edition.

(4) Fundamentals of logic design, Charles H Roth, Jr, Cengage Learning. Fifth Edition.

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning

Activity Based Learning, Quizzes, Seminars.