DIGITAL SYSTEM DESIGN (18EE35)

DIGITAL SYSTEM DESIGN

Subject Code 18EE35 CIE Marks 40
Number of Lecture Hours/Week 3:0:0 SEE Marks 60
Credits 03 Exam Hours 03

Course Learning Objectives:

· Illustrate simplification of Algebraic equations using Karnaugh Maps and Quine- McClusky
Techniques.
· Design combinational logic circuits.
· Design Decoders, Encoders, Digital Multiplexer, Adders, Subtractors and Binary Comparators
· Describe Latches and Flip-flops, Registers and Counters.
· Analyze Mealy and Moore Models.
· Develop state diagrams, Synchronous Sequential Circuits and to understand the basics of various
Memories.

Module-1

Principles of Combinational Logic: Definition of combinational logic, canonical forms, Generation
of switching equations from truth tables, Karnaugh maps-3,4,5 variables, Incompletely specified
functions (Don‘t care terms) Simplifying Max term equations, Quine-McCluskey minimization
technique, Quine-McCluskey using don‘t care terms, Reduced prime implicants Tables.

 

Module-2

Analysis and Design of Combinational logic: General approach to combinational logic design,
Decoders, BCD decoders, Encoders, digital multiplexers, Using multiplexers as Boolean function
generators, Adders and subtractors, Cascading full adders, Look ahead carry, Binary comparators.

Module-3

Flip-Flops: Basic Bistable elements, Latches, Timing considerations, The master-slave flip-flops (pulsetriggered flip-flops): SR flip-flops, JK flip-flops, Edge triggered flip- flops, Characteristic equations.

 

Module – 4

Flip-Flops Applications: Registers, binary ripple counters, synchronous binary counters, Counters based
on shift registers, Design of a synchronous counter, Design of a synchronous mod-n counter using clocked T, JK, D and SR flip-flops.

 

Module – 5

Sequential Circuit Design: Mealy and Moore models, State machine notation, Synchronous Sequential
circuit analysis, Construction of state diagrams, counter design. Memories: Read only and Read/Write Memories, Programmable ROM, EPROM, Flash memory.

 

Course Outcomes: After studying this course, students will be able to:

· Develop simplified switching equation using Karnaugh Maps and QuineMcClusky techniques.
· Design Multiplexer, Encoder, Decoder, Adder, Subtractors and Comparator as digital combinational control circuits.
· Design flip flops, counters, shift registers as sequential control circuits.
· Develop Mealy/Moore Models and state diagrams for the given clocked sequential circuits.
· Explain the functioning of Read only and Read/Write Memories, Programmable ROM, EPROM
and Flash memory.

Question paper pattern:

· The question paper will have ten questions.
· Each full question is for 20 marks.
· There will be 2 full questions (with a maximum of three sub questions in one full
question) from each module.
· Each full question with sub questions will cover the contents under a module.
· Students will have to answer 5 full questions, selecting one full question from each module.

Text Books

1 Digital Logic Applications and Design, John M Yarbrough, Thomson Learning 2001ISBN 981-240-62-1.

2 Digital Principles and Design DonaldD.Givone McGraw Hill 2002 ISBN 978-0-07-052906-9.

Reference Books
1 Digital Circuits and Design D. P.Kothari and J. S Dhillon Pearson 2016, ISBN:9789332543539
2 Digital Design Morris Mano Prentice Hall of India Third Edition
3 Fundamentals of logic design Charles H Roth, Jr., Cengage Learning. Fifth Edition