DIGITAL SYSTEM DESIGN USING VERILOG (18EC644)

 DIGITAL SYSTEM DESIGN USING VERILOG

• Course Code : 18EC644 
• CIE Marks :40
• Lecture Hours/Week :03 
• SEE Marks :60
• Total Number of Lecture Hours : 40 (08 Hrs/module) 
• Exam Hours :03
• CREDITS — 03

Course Learning Objectives: This course will enable students to

• Understand the concepts of Verilog Language.
• Design the digital systems as an activity in a larger systems design context.
• Study the design and operation of semiconductor memories frequently used in application specific digital system.
• Inspect how effectively ICs are embedded in package and assembled inPCBs for difierent application.
• Design and diagnosis of processors and I/O controllers used inembedded systems.

Module -1

Introduction and Methodology: Digital Systems and Embedded Systems, Real-World Circuits, Models, Design Methodology (1.1, 1.3 to 1.5 of Text).

Combinational Basics: Combinational Components and Circuits, Verificationof Combinational Circuits (2.3 and 2.4 of Text).

Number Basics: Unsigned integers, Signed Integers, Fixed point Numbers, Floating-point Numbers (3.1.1, 3.2.1, 3.3.1 and 3.4).

Sequential Basics: Sequential Datapaths and Control Clocked SynchronousTiming Methodology(4.3 up to 4.3.1, 4.4 up to 4.4.1 of Text). L1,L2, L3

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Module -2

Memories: Concepts, Memory Types, Error Detection and Correction (Chap 5 of Text). L1,L2, L3

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Module -3

Implementation Fabrics: Integrated Circuits, Programmable Logic Devices, Packaging and Circuit boards, Interconnection and Signal integrity (Chap 6 of Text). L1,L2, L3

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Module -4

I/O interfacing: I/O devices, I/O controllers, Parallel Buses, Serial Transmission, I/O software (Chap 8 of Text). L1,L2, L3

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Module -5

Design Methodology: Design flow, Design optimization, Design for test, Nontechnical Issues (Chap 10 of Text). L1,L2, L3, L4

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Course outcomes: After studying this course, students will be able to:

1. Construct the combinational circuits, using discrete gates and programmable logic devices.
2. Describe how arithmetic operations can be performed for each kind of code, and also combinational circuits that implement arithmetic operations.
3. Design a semiconductor memory for specific chip design.
4. Design embedded systems using small microcontrollers, larger CPUs/ DSPs, or hard or soft processor cores.
5. Synthesize different types of I/O controllers that are used in embedded system.

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Question paper pattern:

1. Examination will be conducted for 100 marks with question papercontaining 10 full questions, each of 20 marks.
2. Each fiill question can have a maximum of 4 sub questions.
3. There will be 2 full questions from each module covering all the topicsof the module.
4. Students Will have to answer 5 full questions, selecting one full question from each module.
5. The total marks will be proportionally reduced to 60 marks as SEE marks is 60

Text Book:

• 0 Peter J. Ashenden, “Digital Design: An Embedded Systems Approach Using VERILOG”, Elesvier, 2010.

Reference Books:

1. Ming-Bo Lin, “Digital System Designs and Practices: Using Verilog HDL and FPGAs”, \Vlley, 2008
2. Charles Roth, Lizy K. John, Byeong Kil Lee, “Digital Systems Design Using Verilog”, Cengage, lSt Edition.
3. Donald E. Thomas, Philip R. Moorby, “The Verilog Hardware DescriptionLanguage”, Springer, Fifth edition.
4. Michael D. Ciletti, “Advanced Digital Design with the Verilog HDL”Pearson (Prentice Hall), Second edition.