Application Specific Integrated Circuit (BEC714A)

Application Specific Integrated Circuit

Course Code BEC714A 
CIE Marks 50
Teaching Hours/Week (L:T:P:S) 3:0:0:0 
SEE Marks 50
Total Hours of Pedagogy 40 
Total Marks 100
Credits 03 
Exam Hours 03(Theory)

Module-1

Introduction to ASICs: Full custom, Semi-custom and Programmable ASICs, ASIC Design flow, ASIC cell libraries.

CMOS Logic: Data path Logic Cells: Data Path Elements, Adders: Carry skip, Carry bypass, Carry save, Carry select,

Conditional sum, Multiplier (Booth encoding), Data path Operators, I/O cells, Cell Compilers.

Module-2

ASIC Library Design: Logical effort: Predicting Delay, Logical area and logical efficiency, Logical paths, Multi-stage

cells, Optimum delay and number of stages, library cell design.

Programmable ASIC Logic Cells: MUX as Boolean function generators, Acted ACT: ACT 1, ACT 2 and ACT 3 Logic

Modules, Xilinx LCA:XC3000 CLB, Altera FLEX and MAX, Programmable ASIC I/O Cells: Xilinx and Altera I/O Block

Module-3

Low-level design entry: Schematic entry: Hierarchical design, The cell library, Names, Schematic Icons & Symbols,

Nets, Schematic Entry for ASICs, Connections, vectored instances & buses, Edit in place, attributes, Netlist screener.

ASIC Construction: Physical Design, CAD Tools System partitioning, Estimating ASIC size. Partitioning: Goals and

objectives, Constructive Partitioning, Iterative Partitioning Improvement, KL, FM and Look Ahead algorithms.

Module-4

Floor planning and placement: Goals and objectives, Measurement of delay in Floor planning, Floor planning tools,

Channel definition, I/O and Power planning and Clock planning.

Placement: Goals and Objectives, Min-cut Placement algorithm, Iterative Placement Improvement, Time driven

placement methods, Physical Design Flow.

Module-5

Routing: Global Routing - Goals and objectives, Global Routing Methods, Global routing between blocks, Backannotation. Detailed Routing - Goals and objectives, Measurement of Channel Density, Left-Edge Algorithm, AreaRouting Algorithms, Multilevel routing, Timing –Driven detailed routing, Final routing steps, Special Routing, Circuit

extraction and DRC.

Suggested Learning Resources:

Text Books:

1. Michael John Sebastian Smith, “Application - Specific Integrated Circuits”, Addison- Wesley Professional, 2005

2. Khosrow Golshan Conexant Systems, Inc. 2007 Springer Science Business Media “ Physical Design Essentials “

An ASIC Design Implementation Perspective

Reference Books:

 1. Neil H.E. Weste, David Harris, and Ayan Banerjee, “CMOS VLSI Design: A Circuits and Systems Perspective” ,Addison Wesley/ Pearson education 3rdedition, 2011

2. Vikram Arkalgud Chandrasetty, “VLSI Design: A Practical Guide for FPGA and ASIC Implementations” Springer,

ISBN: 978-1-4614-1119-2. 2011

 3. Rakesh Chadha, Bhasker J, “An ASIC Low Power Primer”, Springer, ISBN: 978-14614-4270-7